However, I've still got some problems with an even simpler circuit, which I can only properly describe since I got my first oscilloscope two days ago. I hope this doesn't sound too much gibberish. After a few more problems I've got it working now (see the attached screenshot), instead of the transistor I now use a diode to pull the attack stage down when going into decay, and I also had to power my opamps with 9V since the thresholds of the 74HC14 inverter seem to be at the max value specified in the datasheet, so 3.5V opamp output were just not cutting it. Hence I just added an opamp as a voltage follower in between. And indeed, using a lower value resulted in a bit of improvement, but I don't want the capacitor to discharge through the pulldown. After a bit of fiddling around with the circuit (and verifying that my flipflop-construction works as intended if isolated from the rest of my circuit) I suspected the 1M pulldown resistor to be too high. Hence the OpAmps (LM324) output is capped at ~3.5V (no rail-to-rail, sadly). Oh, I almost forgot, some specs: I'm powering everything from 5V single supply. If you have any ideas on what might be the reason for this behavior, please let me know. But by replacing the 470nF cap with a 10♟ one, I can at least see the ADSR effecting an LED. Since I'm quite new to electronics I don't own an oscilloscope yet, so every debugging needs to be done using a multimeter, sound and LEDs. ![]() In reality, this does not happen until the cap is almost discharged. This should not happen, because the 0V-input between two pulses should immediately pull the output of the right-most inverter high, hence pulling the control-signal for the transistor low (which comes from another inverter). The reason is that the PNP transistor is open, so the capacitor cannot charge. In practice, prototyped on breadboard, too - except when I try to give the next pulse too soon, the ADSR signal does not "retrigger" to the attack-phase, but seems to hold at the current level of "release". The problem is: In the simulation, everything works fine. When set, the "upper" part is grounded and the voltage divider on the top left sets the reference to which the cap should be discharged, the sustain-level. ![]() Two of the inverters used form some kind of Flip-Flop which is set when the capacitor reaches significiant charge and reset when the input pulse goes low. See the attached schematics or the simulation I used to develop this. So I tried to design my own circuit, with reasonable success. A bit more of a problem is: How to generate an ADSR signal? Most of the schematics I found online seemed to be rather complicated and/or used parts I don't have at hand. ![]() Well, the VCA right now is nothing more than a voltage divider including an LDR sitting inside a bit of shrink tubing together with an LED. By now I want to make the resulting sounds a bit more interesting by adding a voltage controlled amplifier controlled by an ADSR envelope generator. Long story short, I watched an interesting video on DIY synths/sequencers ( watch?v=FaoJaLmZaL4) and thought I'd give it a try. Hello fellow EE-enthusiasts! I'm currently experimenting with some simple audio-circuits.
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